// NOT COMPLETE!
// Data file for Carpinelli Relatively Simple example
// Carpinelli, pp 233ff
// changes
ram, name M, size 65536 8
register, name AC, size 8
register, name R, size 8
register, name AR, size 16
register, name PC, size 16
register, name DR, size 8
register, name IR, size 8
register, name TR, size 8
flag, name Z
assembler
word, bytes 1
format, name f0, words 1, fieldCount 0, codeBits 0 7
format, name f1, words 3, fieldCount 1, codeBits 16 23, f1 0 15 value label
NOP , f0, 00 // no operation
LDAC, f1, 010000 // load AC from memory
STAC, f1, 020000 // store AC to memory
MVAC, f0, 03 // move AC to R
MOVR, f0, 04 // move R to AC
JUMP, f1, 050000 // jump to G
JMPZ, f1, 060000 // jump to G if z=1
JPNZ, f1, 070000 // jump to G if z=0
ADD , f0, 08 // add R to AC
SUB , f0, 09 // subtract R from AC
INAC, f0, 0A // increment AC
CLAC, f0, 0B // clear AC
AND , f0, 0C // and R with AC
OR , f0, 0D // or R with AC
XOR , f0, 0E // xor R with AC
NOT , f0, 0F // complement AC
HLT , f0, FF // HALT
endAssembler
helpComputer
Computer Simulator - Carpinelli Very Simple Computer
The computer is defined in:
Computer Systems: Organization and Architecture
John D. Carpinelli
Addison-Wesley, 2001
endHelp
helpAssembler
Help for Carpinelli's Relatively Simple computer assembly language.
This computer has the following commands:
| Instruction |
Hex |
Code |
Operation |
| NOP |
0 |
0000 0000 |
No operation |
| LDAC |
1 |
0000 0000 G | AC <-- M[G] |
| STAC |
2 |
0000 0010 G | M[G] <-- AC |
| MVAC |
3 |
0000 0011 |
R <-- AC |
| MOVR |
4 |
0000 0100 |
AC <-- R |
| JUMP |
5 |
0000 0101 G | goto G |
| JMPZ |
6 |
0000 0110 G | if (Z=1) then goto G |
| JPNZ |
7 |
0000 0111 G | if (Z=0) then goto G |
| ADD |
8 |
0000 1000 |
AC <-- AC + R, if (AC+R=0) then Z <-- 1, else Z <-- 0 |
| SUB |
9 |
0000 1001 |
AC <-- AC - R, if (AC-R=0) then Z <-- 1, else Z <-- 0 |
| INAC |
A |
0000 1010 |
AC <-- AC + 1, if (AC+1=0) then Z <-- 1, else Z <-- 0 |
| CLAC |
B |
0000 1011 |
AC <-- 0, Z <-- 1 |
| AND |
C |
0000 1100 |
AC <-- AC AND R, if (AC?R=0) then Z <-- 1, else Z <-- 0 |
| OR |
D |
0000 1101 |
AC <-- AC OR R, if (AC?R=0) then Z <-- 1, else Z <-- 0 |
| XOR |
E |
0000 1110 |
AC <-- AC XOR R, if (AC?R=0) then Z <-- 1, else Z <-- 0 |
| NOT |
F |
0000 1111 |
AC <-- AC', if (AC'=0) then Z <-- 1, else Z <-- 0 |
| HALT |
FF |
1111 1111 |
halt processor |